[Hardware Router] Development (5/20-5/21)

Attempting to set up routing services for the NetFPGA platform on the Altera DE4 board...

After finishing compilation with just the bare essentials of the platform, the FPGA Ethernet ports were set up using user scripts (written in TCL). The power LEDs of all relevant ports were activated when cables are connected to those ports. Furthermore, when an active Ethernet connection exists on the other side of the port, the Rx light blinks in time with packet transmission. However, the Tx light does not work, indicating that the board is still not sending any packets, neither in reply (such as ICMP Ping packets), nor in forwarding (as router should). Therefore, I have begun by attempting Layer 2 connectivity testing. A linux utility called Linkloop was installed on the linux laptop that David was using.

Attempts to install Linkloop on the secondary Linux PC proved... difficult... due to the fact that the Linux PC does not have a C compiler! As a result, the decision was made to utilize Cygwin on my personal laptop as the second end-point of the Linkloop testing structure. Linkloop was installed on both devices, and layer 2 connectivity test progressed.

Layer 2 connectivity unsuccessful. The problem appears to be in the PHY layer, and unrelated to MAC. However, further testing is required.

The Altera DE4 board uses a Marvell Fast Ethernet Transceiver for the PHY. The PHY is configured during initial runtime setup by means of a user script. The script sets each of the required PHY register values, including speed (they are capable of 10mbps, 100mbps, and 1gbps), auto-negotiation, and Duplex value (half or full duplex). The remainder of the procedure is still mysterious to me, but is laid out nicely in the configuration script. Further detailed analysis is required in order to fully understand the process by which the PHY control registers are configured, and to understand why connectivity is not properly established, in terms of outward data transmission.